Polychrony for System Design
Jean-Pierre Talpin
Presenter: Jean-Pierre Talpin, scientific leader of project ESPRESSO at INRIA (the French National Institute for Research in Computer Science and Control), will speak on "Polychrony for System Design". The ESPRESSO project designs and implements models, methods and tools for the synchronous, component-based, engineering of architectures and systems that are globally asynchronous and locally synchronous (GALS).
Host: UCI Irvine Division (contact: Catherine Hammond at hammondc@uci.edu).
Date: Wednesday, July 24, 2002
Time: 2:00pm
Location: Room IERF-127, UC Irvine Campus (directions and parking information)
Abstract: Rising complexities and performances of integrated circuits and systems, shortening time-to-market demands for electronic equipment, stress high-level design as a prominent research topic and call for the development of appropriate methodological solutions.
In this aim, system design based on the so-called "synchronous hypothesis'' consists of abstracting the nonfunctional implementation details of a system away and let one benefit from a focused reasoning on the logics behind the instants at which the system functionalities should be secured. From this point of view, synchronous design models and languages provide intuitive (ontological) models for integrated circuits. This affinity explains the ease of generating synchronous circuits and verify their functionalities using compilers and related tools that implement this approach.
In the relational mathematical model behind the design language SIGNAL, this affinity goes beyond the domain of purely synchronous circuits, and embraces the context of complex architectures consisting of synchronous circuits and desynchronization protocols: globally asynchronous and locally synchronous architectures (GALS). The unique features of the relational model behind SIGNAL are to provide the notion of "polychrony'': the capability to describe circuits and systems with several clocks; and to support refinement: the ability to assist and support system design from the early stages of requirements specification to the later stages of synthesis and deployment.
The SIGNAL model provides a design methodology that forms a continuum from synchrony to asynchrony, from specification to implementation, from abstraction to concretization, from interfaces to implementations. SIGNAL gives the opportunity to seamlessly model circuits and devices at multiple levels of abstractions, by implementing mechanisms found in many hardware simulators, while reasoning within a simple and formally defined mathematical model.
In the same manner, the flexibility inherent to the abstract notion of signal handled in the synchronous-desynchronized design model of SIGNAL invites and favors the design of correct by construction systems by means of well-defined transformations of system specifications (morphisms) that preserve the intended semantics and stated properties of the architecture under design.
Bio: Jean-Pierre Talpin holds a Master in Applied Mathematics and a Ph.D. degree he received in 1993 from the University of Paris VI for his work as research and teaching assistant at the Ecole des Mines de Paris. He then worked as research associate in the distributed systems group at the European Computer Industry Research Centre (ECRC) in Munich until he joined the SIGNAL group at IRISA (Rennes) as INRIA Fellow in 1995. He is now the scientific leader of the continued SIGNAL group, the INRIA project ESPRESSO.
More Information: See Dr. Talpin's webpage at http://www.irisa.fr/prive/talpin or the ESPRESSO project webpages at http://www.irisa.fr/espresso.